meta data for this page
Prescaler OnSemi MC12080
This PCB is some kind of evaluation board for the OnSemi MC12080. This is a programmable prescaler with divisions of 10,20,40, and 80. The chip is supposed to work up to 1.1 GHz.
This PCB is intended to be used to scale down a beat note to a more usable frequency range. In specific to be measured after downscaling by a RedPitaya, which is then used for offset locking.
Optionen und Alternativen
The logic inputs for divisor selection is optional. It can also be used in a fixed mode by soldering resistors selectively.
first tests show that it works for up to 1 GHz (for now the largest frequency tested) and divisions of 80. More will follow.
tested for div = 80 (logic: 3x Low):
|frequency [MHz]||min amplitude [dBm]||max amplitude [dBm] **|
* with $R_L = 820 Ohm$ and $C_L = 10p$ there is not the full 1.2V output swing (ca 900 mV). Maybe changing the load helps.
** start of decreasing output swing
Beginn des Projekts: März 2018
prototype in testing phase
- general concept works, some minor modifications needed (see 'Meckerliste')
- the changes are implemented in the layout (v2), in principle ready for ordering
would be interesting to see if theres added phasenoise.
effort for reproduction: 3 PCBs (v1) left, MC12080 needs to be ordered
Christian Meiners, firstname.lastname@example.org
The schematic is based on the testing circuit given in the datasheet. The logic input is based on a triple schmitt trigger, to (if necessary) convert from 3.3 V to 5 V logic. The power supply is expected to be 5 V and is filtered onboard. I recognized that the power supply is only 4.2 V coming from the RedPitaya, but it seems to work anyway.
The output signal of the prescaler chip is a (almost) square wave with a offset of about 2.5 V. The shape can be adjusted by changing the load resistor. Because the pfd (phase frequency detector) of the RedPitaya seems to need zero crossings on the input signal, I cut the line between load resistor and capacitor, removed C_L and soldered an inline C=10n as a DC block instead. This way I get a square with zero offset, that the RedPitaya can properly compare to the desired frequency.
- schematic in PDF-format
- the schematic and the pcb layout are created via KiCad and can be found on the git server: https://git.iqo.uni-hannover.de/vlbai/prescaler.git
- Input a RF signal on the input. There should be a square wave output with a frequency according to f_in/div
- change div, the output frequency should change accordingly.
there are three logic input lines, whith these the division ratio can be programmed:
- 3x Low: div = 80
- 1x High: div = 40
- 2x High: div = 20
- 3x High: div = 10
it doesn't matter which pins are high or low.
|Leiterplatte||1x||27.74 €||€||1/5 von 138.69EUR|
|SN74LVC3G17||1x||00.50 €||€||ca. Mouser|
|R,C||20x||0.02 €||€||Bauform 0805|
|Bestückung||??.00 €||bei SRM|
Was für die nächste Version zu tun ist: (: verworfen, : in Arbeit, : im Schaltplan, aber noch nicht im Layout, : erledigt)
- there seems to be a DC offset on the output. maybe a highpass on the output would be nice to get rid of it. For now I solved this issue by cutting the line between the load resistor (changed to 470 Ohm) and the removed load capacitor and soldered a 10 nF capacitor there.
- the level of the logic input is not well defined, when disconnected. maybe add a pulldown.