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eigenbau:presacler:start [2018/04/11 13:00] – [Status] meiners | eigenbau:presacler:start [2018/04/11 13:41] – [Kalkulation] meiners | ||
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==== Schaltplan ==== | ==== Schaltplan ==== | ||
* {{ : | * {{ : | ||
- | * the source is created via KiCad and can be found on the git server: [[https:// | + | * the schematic and the pcb layout are created via KiCad and can be found on the git server: [[https:// |
==== Layout ==== | ==== Layout ==== | ||
* Size: 43 x 22 mm /* Höhe mal Breite in mm */ | * Size: 43 x 22 mm /* Höhe mal Breite in mm */ | ||
* Supply: +5V | * Supply: +5V | ||
- | * Logic; 3x 3.3 V or 5V optional | + | * Logic; 3x 3.3 V or 5V (optional) |
- | * Eingang: SMA, up to 1.1 GHz | + | * Eingang: SMA, up to 1.1 GHz (nominal) |
* Ausgang: SMA $ f_{out} = f_{in} / div $ (1.1 GHz / 10 = 110 MHz max) | * Ausgang: SMA $ f_{out} = f_{in} / div $ (1.1 GHz / 10 = 110 MHz max) | ||
- | * Der Bestückungsdruck: | + | * Der Bestückungsdruck: |
* Die Bestückungsliste: | * Die Bestückungsliste: | ||
* {{ : | * {{ : | ||
- | * Die Source des Layouts im pcb-Format liegt auf der [[: | ||
/* Das Layout als gerenderter Export vom EDA-Programm | /* Das Layout als gerenderter Export vom EDA-Programm | ||
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^ was ^ wieviel ^ E-Preis ^ Preis ^ Anmerkung | ^ was ^ wieviel ^ E-Preis ^ Preis ^ Anmerkung | ||
- | | | + | | |
| Gehäuse | 1x | ??.?? € | ~~=round(cell(1, | | Gehäuse | 1x | ??.?? € | ~~=round(cell(1, | ||
- | | | + | | |
- | | R,C | | + | | SN74LVC3G17 | 1x | 00.50 € | ~~=round(cell(1, |
+ | | R,C | | ||
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* :OK: there seems to be a DC offset on the output. maybe a highpass on the output would be nice to get rid of it. For now I solved this issue by cutting the line between the load resistor (changed to 470 Ohm) and the removed load capacitor and soldered a 10 nF capacitor there. | * :OK: there seems to be a DC offset on the output. maybe a highpass on the output would be nice to get rid of it. For now I solved this issue by cutting the line between the load resistor (changed to 470 Ohm) and the removed load capacitor and soldered a 10 nF capacitor there. | ||
* :OK: the level of the logic input is not well defined, when disconnected. maybe add a pulldown. | * :OK: the level of the logic input is not well defined, when disconnected. maybe add a pulldown. | ||
+ | |||