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eigenbau:presacler:start [2018/03/27 09:26] – [Schaltungsprinzip] meinerseigenbau:presacler:start [2018/04/11 13:47] (current) – [Status] meiners
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 ==== Status ==== ==== Status ====
 /* reine Idee / Prototyp / fertig zur Massenproduktion ... */ /* reine Idee / Prototyp / fertig zur Massenproduktion ... */
-prototype in testing phase\\      +prototype in testing phase\\ 
-effort for reproduction: 3 PCBs left, MC12080 needs to be ordered                  +  * general concept works, some minor modifications needed (see 'Meckerliste'
 +  * the changes are implemented in the layout (v2), in principle ready for ordering 
 + 
 +would be interesting to see if theres added phasenoise. 
 + 
 +   
 +effort for reproduction: 3 PCBs (v1) left, MC12080 needs to be ordered                  
  
 ==== Entwickler ==== ==== Entwickler ====
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 The schematic is based on the testing circuit given in the {{ :eigenbau:presacler:mc12080-d-36764.pdf |datasheet}}. The logic input is based on a triple schmitt trigger, to (if necessary) convert from 3.3 V  to 5 V logic. The power supply is expected to be 5 V and is filtered onboard. I recognized that the power supply is only 4.2 V coming from the RedPitaya, but it seems to work anyway. The schematic is based on the testing circuit given in the {{ :eigenbau:presacler:mc12080-d-36764.pdf |datasheet}}. The logic input is based on a triple schmitt trigger, to (if necessary) convert from 3.3 V  to 5 V logic. The power supply is expected to be 5 V and is filtered onboard. I recognized that the power supply is only 4.2 V coming from the RedPitaya, but it seems to work anyway.
 +
 +The output signal of the prescaler chip is a (almost) square wave with a offset of about 2.5 V. The shape can be adjusted by changing the load resistor. Because the pfd (phase frequency detector) of the RedPitaya seems to need zero crossings on the input signal, I cut the line between load resistor and capacitor, removed C_L and soldered an inline C=10n as a DC block instead. This way I get a square with zero offset, that the RedPitaya can properly compare to the desired frequency.
 +
 +
 +
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 +
 +
  
 ==== Schaltplan ==== ==== Schaltplan ====
   * {{ :eigenbau:presacler:prescaler.pdf |schematic}} in PDF-format   * {{ :eigenbau:presacler:prescaler.pdf |schematic}} in PDF-format
-  * the source is created via KiCad and can be found on the git server: [[https://git.iqo.uni-hannover.de/vlbai/prescaler.git]]+  * the schematic and the pcb layout are created via KiCad and can be found on the git server: [[https://git.iqo.uni-hannover.de/vlbai/prescaler.git]]
  
 ==== Layout ==== ==== Layout ====
   * Size: 43 x 22 mm /* Höhe mal Breite in mm */   * Size: 43 x 22 mm /* Höhe mal Breite in mm */
   * Supply: +5V   * Supply: +5V
-  * Logic; 3x 3.3 V or 5V optional +  * Logic; 3x 3.3 V or 5V (optional) 
-  * Eingang: SMA, up to 1.1 GHz+  * Eingang: SMA, up to 1.1 GHz (nominal)
   * Ausgang: SMA $ f_{out} = f_{in} / div $ (1.1 GHz / 10 = 110 MHz max)   * Ausgang: SMA $ f_{out} = f_{in} / div $ (1.1 GHz / 10 = 110 MHz max)
-  * Der Bestückungsdruck: {{:eigenbau:presacler:start:start_layout.pdf}}+  * Der Bestückungsdruck: {{ :eigenbau:presacler:prescaler-bestueckung.pdf |}}
   * Die Bestückungsliste: {{:eigenbau:presacler:start:start__bom.pdf}}, {{:eigenbau:presacler:start:start_bom.xls}}   * Die Bestückungsliste: {{:eigenbau:presacler:start:start__bom.pdf}}, {{:eigenbau:presacler:start:start_bom.xls}}
   * {{ :eigenbau:presacler:prescaler_gerber.zip |zipped gerber files}} for PCB ordering   * {{ :eigenbau:presacler:prescaler_gerber.zip |zipped gerber files}} for PCB ordering
-  * Die Source des Layouts im pcb-Format liegt auf der [[:eigenbau:presacler:src:sourcen#start|Download-Seite des Wiki]]. FIXME  
  
 /* Das Layout als gerenderter Export vom EDA-Programm  /* Das Layout als gerenderter Export vom EDA-Programm 
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 ==== Test ==== ==== Test ====
 FIXME          /* Welche Signale sollten wo zu sehen sein? */ FIXME          /* Welche Signale sollten wo zu sehen sein? */
 +
 +  * Input a RF signal on the input. There should be a square wave output with a frequency according to f_in/div
 +  * change div, the output frequency should change accordingly.
 +  * 
 +
 +
  
 ==== Bedienung ==== ==== Bedienung ====
-FIXME          /* Was beim Einsatz zu beachten ist. Eventuell mit Anweisung zur Inbetriebnahme. */+/* Was beim Einsatz zu beachten ist. Eventuell mit Anweisung zur Inbetriebnahme. */ 
 + 
 +there are three logic input lines, whith these the division ratio can be programmed: 
 + 
 +  * 3x Low: div = 80 
 +  * 1x High: div = 40 
 +  * 2x High: div = 20 
 +  * 3x High: div = 10
  
 +it doesn't matter which pins are high or low.
 ==== Bilder ==== ==== Bilder ====
 /* Photos vom Gerät. Wenn möglich und sinnvoll Nahaufnahmen von der Platine. Die /* Photos vom Gerät. Wenn möglich und sinnvoll Nahaufnahmen von der Platine. Die
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 ^           was ^ wieviel ^  E-Preis ^    Preis ^ Anmerkung  ^           was ^ wieviel ^  E-Preis ^    Preis ^ Anmerkung 
-|     Leiterplatte |   1x |  ??.?? € |  ~~=round(cell(1,row())*cell(2,row());2)~~ € | 1/von XXX EUR  |+|     Leiterplatte |   1x |  27.74 € |  ~~=round(cell(1,row())*cell(2,row());2)~~ € | 1/von 138.69EUR  |
 |          Gehäuse |   1x |  ??.?? € |  ~~=round(cell(1,row())*cell(2,row());2)~~ € |  | |          Gehäuse |   1x |  ??.?? € |  ~~=round(cell(1,row())*cell(2,row());2)~~ € |  |
-               * |   ?x |  ??.?? € |  ~~=round(cell(1,row())*cell(2,row());2)~~ € | ...  +         MC12080 |   1x |  04.12 € |  ~~=round(cell(1,row())*cell(2,row());2)~~ € | Mouser| 
-|              R,C |  ??x |   0.02 € |  ~~=round(cell(1,row())*cell(2,row());2)~~ € | Bauform 0805  |+|      SN74LVC3G17 |   1x |  00.50 € |  ~~=round(cell(1,row())*cell(2,row());2)~~ € | ca. Mouser| 
 +|       connectors |   1x |  ??.?? € |  ~~=round(cell(1,row())*cell(2,row());2)~~ € | ... | 
 +|              R,C |  20x |   0.02 € |  ~~=round(cell(1,row())*cell(2,row());2)~~ € | Bauform 0805  |
 |       Bestückung |                    ??.00 € ||| bei SRM  | |       Bestückung |                    ??.00 € ||| bei SRM  |
 |   [[:eigenbau:Verschnitt]] |           ?.?? € |||  | |   [[:eigenbau:Verschnitt]] |           ?.?? € |||  |
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 Was für die nächste Version zu tun ist: (:no:: verworfen, :Ok:: in Arbeit, :ok:: im Schaltplan, aber noch nicht im Layout, :OK:: erledigt) Was für die nächste Version zu tun ist: (:no:: verworfen, :Ok:: in Arbeit, :ok:: im Schaltplan, aber noch nicht im Layout, :OK:: erledigt)
  
-  * there seems to be a DC offset on the output. maybe a highpass on the output would be nice to get rid of it. For now I solved this issue by cutting the line between the load resistor (changed to 470 Ohm) and the removed load capacitor and soldered a 10 nF capacitor there.  +  * :OK: there seems to be a DC offset on the output. maybe a highpass on the output would be nice to get rid of it. For now I solved this issue by cutting the line between the load resistor (changed to 470 Ohm) and the removed load capacitor and soldered a 10 nF capacitor there.  
-  * the level of the logic input is not well defined, when disconnected. maybe add a pulldown.+  * :OK: the level of the logic input is not well defined, when disconnected. maybe add a pulldown.